1. Field of the Invention
The field of the invention relates to data processing and in particular to diagnostic mechanisms for monitoring data processing operations.
2. Description of the Prior Art
There are a number of situations where it is desirable to keep track of the processing being performed by a data processor. For example, such information is useful during the development of data processing systems, where it is often desirable to track the activity of the processing circuit. An example of tracing infrastructure that may be used to assist in such a process is a tracing tool.
Tracing the activity of a data processing system whereby a trace stream is generated including data representing the step-by-step activity within the system is a highly useful tool in system and software development. Such tracing tools use a variety of means for tracing the program flow including Embedded Trace Macrocells (ETM™) which are present on the chip whose processing is being monitored.
As the complexity of new devices increases, the support infrastructure and tools also need to increase in complexity. Existing trace sources (such as ETMs) support a large range of programming and configuration capabilities that when used effectively, allow the generation of trace data to be accurately controlled and managed and also the capture of this data to be limited to regions of interest. This helps avoid the generation of far too much trace data which it would be both difficult to download from the data processing apparatus and difficult to analyse.
With the development of trace infrastructure to extend beyond a single CPU to multiple components, the complexity and configuration required by the user increases even further. Understanding the flow of information around a chip requires each trace source to be configured with an awareness of how other trace sources are related. Furthermore, before tracing can be initiated multiple trace sources may need to be configured.
FIG. 1 shows a chip 10 according to the prior art comprising a number of trace sources 21, 22, 23, 24 each operable to trace the operation of a different device on the chip. Thus, there is DSP trace hardware 24 to trace the activity of a digital signal processor two ETMS 21, 23 to trace two different CPU's and a bus trace macrocell 22 to monitor the activity of Bus 30. Thus, four different streams of trace data are generated. These are combined in a Funnel 40 and are then output via output Port 50.
In such a system, not only are four different streams of trace data produced but also four different trace sources need to be configured. If specific detailed trace knowledge is required, such as both address and data values, complex configuration and detailed knowledge of the complex SoC infrastructure is needed in order to tightly control the trace region in order to limit the amount of data produced to enable bandwidth restrictions on trace ports, such as Trace Port 50, to be met.
The present invention seeks to address some of the above problems.